1. Field of the Invention
The present invention relates to a phase compensation circuit of a voltage regulator.
2. Description of the Related Art
A conventional voltage regulator is described. FIG. 4 is a circuit diagram illustrating the conventional voltage regulator.
The conventional voltage regulator includes a reference voltage circuit 101, a differential amplifier circuit 102, a PMOS transistor 106, a phase compensation circuit 460, resistors 108 and 109, a ground terminal 100, an output terminal 121, and a power supply terminal 150. The phase compensation circuit 460 includes a constant current circuit 405, NMOS transistors 401, 406, 403, and 408, capacitors 402 and 407, and a resistor 404. The differential amplifier circuit 102 is formed by a single-stage amplifier as illustrated in FIG. 5.
Connection in the conventional voltage regulator is described. The differential amplifier circuit 102 has an inverting input terminal connected to any one terminal of the reference voltage circuit 101, a non-inverting input terminal connected to a connection point between any one terminal of the resistor 108 and any one terminal of the resistor 109, and an output terminal connected to a gate of the PMOS transistor 106 and a drain of the NMOS transistor 401. The other terminal of the reference voltage circuit 101 is connected to the ground terminal 100. The NMOS transistor 401 has a source connected to a drain of the NMOS transistor 403 and the capacitor 402, and has a gate connected to a gate and a drain of the NMOS transistor 406. The NMOS transistor 403 has a source connected to the ground terminal 100, and has a gate connected to any one terminal of the resistor 404 and a drain of the NMOS transistor 408. The NMOS transistor 408 has a source connected to the ground terminal 100, a gate connected to the other terminal of the resistor 404 and a connection point between any one terminal of the capacitor 402 and any one terminal of the capacitor 407, and a drain connected to a source of the NMOS transistor 406. The NMOS transistor 406 has the drain connected to any one terminal of the constant current circuit 405. The other terminal of the constant current circuit 405 is connected to the power supply terminal 150. The PMOS transistor 106 has a source connected to the power supply terminal 150, and has a drain connected to the output terminal 121, the other terminal of the capacitor 407, and the other terminal of the resistor 108. The other terminal of the resistor 109 is connected to the ground terminal 100. (See, for example, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, VOL. 54, NO. 9, SEPTEMBER 2007 (FIG. 13).)
In the conventional technology, however, the phase compensation circuit 460 is configured to cause a part of current of the output terminal of the differential amplifier circuit 102 to flow into the ground. Accordingly, there has been a problem that a current flows from a transistor 503 of the differential amplifier circuit 102 to the output, and the balance between currents flowing through input transistors 501 and 504 is lost to cause an offset, with the result that an accurate output voltage becomes difficult to obtain.